Formal Bytes - Episode 13

This week, Dr. Darbari has an informal chat about formal verification with Dr. Sean Safarpour – Group Director, Synopsys, and head of VC Formal product line. Sean talks about his journey from being a graduate student to leading a world-class team of engineers at Synopsys. Sean talks about tools, technology, methodology, coverage, and more.

Formal Bytes - Episode 12

What happens when you apply formal verification to find architectural flaws in processors? In this podcast, Dr. Ashish Darbari talks about an interesting way of using Axiomise ISA formal proof kit to find bugs in RISC-V cores.

Formal Bytes - Episode 11

One of the biggest challenges with formal verification is scoping out what constraints are needed, and how they will be coded in formal verification for efficient predictable results. In this podcast, we discuss the role of constraints in formal verification.

Formal Bytes - Episode 10

 Dr. Darbari talks to Dr. Lauro Rizzatti – the emulation super Guru. Lauro traces his journey from Italy to the USA, explaining the many different, technological aspects of emulation, starting from its roots to the modern-day. Everyone in DV should find this highly educational.

Formal Bytes - Episode 9

In this podcast, Dr Darbari will talk about the role of coverage in formal verification and sign-off. We examine why coverage is important and what can be done to sign-off the verification with confidence. We discuss the interaction between structural coverage, functional coverage in simulation and what happens for formal verification, and what should happen?

Formal Bytes - Episode 8

In this podcast, Dr Darbari talks about the role of specifications in verification. Requirements & specifications play a very important part in establishing what can be obtained from a verification task. The general rule is if it ain’t specified it won’t be verified. After all, any testing & verification exercise needs to know what is being tested, and what is expected from a test?

Formal Bytes - Episode 7

In this podcast, Dr. Ashish Darbari talks to Harry Foster, Chief Scientist at Mentor Graphics about all things verification. Harry talks about ATPG, the origin of assertion languages, property checking, equivalence checking, and FPGAs. He shares insights about his association with Accellera and contributions to the Verification Academy. We talk about 5 tips that all verification engineers & managers will find useful to get productive with verification.

Formal Bytes - Episode 6

We describe what are the key factors to maximize verification ROI, focussing on Axiomise formal verification and how we can improve the return-on-investment.

Formal Bytes - Episode 5

Dr Darbari talks about why processors need formal verification in the latest podcast. He describes why processors are complex, and why formal verification is a necessity.

Formal Bytes - Episode 4

In this podcast, we cover the rich history of formal methods, explaining the basics of formal verification covering theorem proving, model checking and equivalence checking. We explain why formal verification is perceived to be hard. We make formal verification easier!

Formal Bytes - Episode 3

In this podcast, Dr Ashish Darbari talks about testing and formal verification for SoCs. He describes the basics of simulation-based-verification techniques such as constrained random verification, directed testing, emulation, and formal verification. Subscribe to our youtube channel and our newsletters at axiomise.com. Ping us at info@axiomise.com with your suggestions, questions, and feedback.

Formal Bytes - Episode 2

In this podcast, Dr Ashish Darbari presents a 30,000 ft introduction to a system-on-chip (SoC) and the numerous test and verification challenges that affect the design of these ubiquitous components that almost everyone on the planet owns! 

Formal Bytes - Episode 1

Axiomise has turned two! In this first podcast, Axiomise founder & CEO Dr Ashish Darbari talks about his passion for formal verification and the different challenges engineers face in adopting formal.  Tune in to enjoy our regular formal bytes!

 This week, Dr. Darbari has an informal chat about formal verification with Dr. Sean Safarpour – Group Director, Synopsys, and head of VC Formal product line. Sean talks about his journey from being a graduate student to leading a world-class team of engineers at Synopsys. Sean talks about tools, technology, methodology, coverage, and more.

What happens when you apply formal verification to find architectural flaws in processors? In this podcast, Dr. Ashish Darbari talks about an interesting way of using Axiomise ISA formal proof kit to find bugs in RISC-V cores. He describes how by using the combination of automated formal properties from the Axiomise proof kit together with constraints we can not only find bugs but also root-cause the precise nature of simulation resistant bugs. You might like this podcast if you ever wondered how constraints together with automated formal can be used to address the complex challenges of finding corner-case bugs in your CPU designs.

One of the biggest challenges with formal verification is scoping out what constraints are needed, and how they will be coded in formal verification for efficient predictable results. In this podcast, we discuss the role of constraints in formal verification.

Hope you liked last week’s podcast on formal coverage. Taking a different view this week, Dr. Darbari talks to Dr. Lauro Rizzatti – the emulation super Guru. Lauro traces his journey from Italy to the USA, explaining the many different, technological aspects of emulation, starting from its roots to the modern-day. Everyone in DV should find this highly educational.

In this podcast, Dr. Darbari talks about the role of coverage in formal verification and sign-off. We examine why coverage is important and what can be done to sign-off the verification with confidence. We discuss the interaction between structural coverage, functional coverage in simulation, and what happens for formal verification, and what should happen?

In this podcast, Dr. Darbari talks about the role of specifications in verification. Requirements & specifications play a very important part in establishing what can be obtained from a verification task. The general rule is if it ain’t specified it won’t be verified. After all, any testing & verification exercise needs to know what is being tested, and what is expected from a test?

In this podcast, Dr. Ashish Darbari talks to Harry Foster, Chief Scientist at Mentor Graphics about all things verification. Harry talks about ATPG, the origin of assertion languages, property checking, equivalence checking, and FPGAs. He shares insights about his association with Accellera and contributions to the Verification Academy. We talk about 5 tips that all verification engineers & managers will find useful to get productive with verification.

We describe what are the key factors to maximise verification ROI, focusing on Axiomise formal verification and how we can improve the return-on-investment.

Dr. Darbari talks about why processors need formal verification in the latest podcast. He describes why processors are complex, and why formal verification is a necessity.

In this podcast, we cover the rich history of formal methods, explaining the basics of formal verification covering theorem proving, model checking and equivalence checking. We explain why formal verification is perceived to be hard. We make formal verification easier!